MSM CPU bandwidth device

cpubw is a device that represents the CPU subsystem master ports in a MSM SoC
and the related info that is needed to make CPU to DDR bandwidth votes.

Required properties:
- compatible:		Must be "qcom,cpubw"
- qcom,cpu-mem-ports:	A list of tuples where each tuple consists of a bus
			master (CPU subsystem) port number and a bus slave
			(memory) port number.
- qcom,bw-tbl:		A list of meaningful instantaneous bandwidth values
			(in MB/s) that can be requested from the CPU
			subsystem to DDR. The list of values depend on the
			supported DDR frequencies and the bus widths.

Example:

	qcom,cpubw {
		compatible = "qcom,cpubw";
		qcom,cpu-mem-ports = <1 512>, <2 512>;
		qcom,bw-tbl =
			<  572 /*  75 MHz */ >,
			< 1144 /* 150 MHz */ >,
			< 1525 /* 200 MHz */ >,
			< 2342 /* 307 MHz */ >,
			< 3509 /* 460 MHz */ >,
			< 4684 /* 614 MHz */ >,
			< 6103 /* 800 MHz */ >,
			< 7102 /* 931 MHz */ >;
	};
